SPI fast read-only controller

This is a simple read-only SPI flash reader, with the following characteristics:
  • Fast-READ only implementation.
  • 32-bit only access
  • Fast sequential read access - Uses low-clock approach

    • Version

    The current version is 1.2. This is also the first public version available.

    Timing overview

    Simple timing overview, with one nonsequential access to address 0x0, followed by a sequential access to address 0x4 (click on image for larger version). This simulation was done with Xilinx tools, after post-routing, and using a ZPU to access the SPI

    Image 1: Timing overview

    On Image 2, you can see the clock almost perfectly centered on data, when we write to the SPI flash.

    Image 2: Issuing commands to the SPI

    As you can see from Image 3, I assume the worst-case read delay from SPI (which is 15ns, as you can see from the marker).

    Image 3: Reading from the SPI

    Usage

    Image 4: SPI Symbol

    Simple description of SPI controller interface:
    Symbol Direction Bit width Purpose
    adrInput24Address where to read from SPI
    dat_oOutput32Data read from SPI
    clkInput1Input clock. Used for both interface and SPI
    ceInput1Chip Enable
    rstInput1Asynchronous reset
    ackOutput1Data valid ACK
    SPI_CLKOutput1SPI output clock
    SPI_MOSIOutput1SPI output data from controller to chip
    SPI_MISOInput1SPI input data from chip to controller
    SPI_SELNOutput1SPI nSEL (deselect, active low) signal

    License

    The Verilog implementation is released under BSD license. See the file itself for more licensing details.

    Dowload

    Download the Verilog code here: spi_controller.v

    Troubleshooting

    The current implementation is timed and optimized for myself. Your parameters might not be the same as those I defaulted, so read the code carefully. If you have any issue let me know.